High-Performance Compute Systems Designer

1 week ago

Melbourne, Victoria, Australia beBeeDesignEngineer Full time $180,000 - $240,000
Job Overview

This role is focused on developing cutting-edge multi-core in-memory compute SoCs, requiring strong technical skills and expertise in synthesis, timing analysis, and physical verification.

Candidates should have a deep understanding of EDA tools such as Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, and Calibre. Experience with automation scripts in Python, Tcl, or Perl is also required.

Key Responsibilities:
  • Perform synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification tasks efficiently.
  • Develop and implement clock tree synthesis (CTS) techniques to meet design requirements.
  • Collaborate with architecture, RTL, and verification teams to ensure seamless integration of IPs including memories, I/Os, embedded processors, DDR, networking fabrics, and analog IPs.
  • Utilize EDA tools for optimized design closure and constraint generation.
Requirements:
  • At least 10 years of experience in Physical Design (RTL to GDS).
  • Strong communication and teamwork skills are essential for this role.
  • Expertise in leading EDA tools and proficiency in scripting languages are must-haves.
  • Familiarity with IP integration across various domains and problem-solving skills are highly valued.
Benefits:

Successful candidates can expect a challenging yet rewarding career path, opportunities for professional growth, and collaboration with top talent in the industry.

What We're Looking For:

Our ideal candidate will possess a unique blend of technical expertise, business acumen, and interpersonal skills, ensuring their success in this critical role.

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