Chief Digital Signal Processing Architect

2 weeks ago

Sydney, New South Wales, Australia beBeeWireless Full time $150,000 - $200,000

We are seeking a highly skilled and experienced Engineer to join our team in the development of next-generation Wi-Fi technology.

This role involves designing, integrating, verifying and bringing up an IEEE 802.11ah PHY for use in Wi-Fi chips. You will work closely with digital, systems and firmware teams to architect and verify the PHY and ensure that functional and performance goals are met.

Key Responsibilities:

  • Design and develop 802.11ah PHY in Scala (Chisel), SystemVerilog and C
  • Perform functional verification of 802.11ah PHY in RTL simulators, SDF-annotated gate level simulators and AMS simulators using SystemVerilog, Verilog-A, Matlab, C and Python
  • Work closely with Systems team to achieve best performance
  • Work closely with Analog & RF team to define and improve radio interface
  • Work closely with Firmware team to develop embedded PHY firmware
  • Assist with bring-up of silicon in the lab and debug PHY performance

Essential Skills and Qualifications:

  • Bachelor's degree or higher in Electrical/Electronics/Communication Engineering or Computer Science
  • At least 3 years experience as a PHY IC Design Engineer
  • Solid understanding of digital signal processing (DSP) with emphasis on HW implementation
  • Proven experience developing multiple DSP blocks of in complex SoCs
  • Familiarity with IEEE PHY layer and 802.11ah
  • Deep understanding of digital design fundamentals including low power and multi-clock-domain design
  • Hands-on experience with Cadence or Synopsys simulation suite
  • Hands-on experience with Linux development environment staples such as make, shell scripts and Python
  • Excellent verbal and written communication skills
  • Proven ability to work constructively within team and among other groups
  • Strong analytical and problem-solving skills
  • Determination to deliver even under time pressure
  • Practical hands-on attitude

Bonus Skills:

  • Proven experience performing PHY bring up, debug and performance measurement on silicon in the lab
  • Good understanding of embedded processors with familiarity with RISC-V
  • Solid understanding of mixed-signal ASIC design and simulation
  • Experience using git revision control tool
  • Experience with development and debugging of digital designs from RTL design through

We Offer:

  • Competitive salary and excellent stock option package
  • Performance bonus opportunity

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