Senior Silicon Physical Design Expert

6 days ago

Melbourne, Victoria, Australia beBeeSiliconDesigner Full time $150,000 - $200,000

Job Role: Senior Silicon Physical Design Engineer

About the Role

We are seeking a highly skilled engineer to develop cutting-edge multi-core in-memory compute SoCs.

Key Responsibilities
  • Perform synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification.
  • Ensure timing closure, constraint generation, and optimization.
  • Execute clock tree synthesis (CTS) and clock-building techniques.
  • Integrate IPs including memories, I/Os, embedded processors, DDR, networking fabrics, and analog IPs.
  • Utilize EDA tools such as Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, and Calibre.
  • Develop automation scripts in Python, Tcl, or Perl.
  • Debug and solve technical challenges related to physical design.
  • Collaborate with architecture, RTL, and verification teams.
Required Skills and Qualifications
  • 10+ years of experience in Physical Design (RTL to GDS).
  • Strong communication and teamwork skills.
  • Expertise in synthesis, timing analysis, and timing closure.
  • Hands-on experience with leading EDA tools.
  • Proficiency in clocking techniques and CTS.
  • Experience in IP integration across various domains.
  • Strong scripting skills (Python, Tcl, or Perl).
  • Proven problem-solving and debugging capabilities.
  • Fluent in English (spoken and written).
Benefits
  • Possible experience in top-level integration and I/O ring design.
  • Awareness of chip-package-board co-simulation and packaging.
  • Ability to influence design methodologies and tool flows.
  • Experience working with EDA vendors to resolve tool issues.
  • Understanding of semiconductor device physics and multi-domain design.
Others

This role offers the opportunity to work on cutting-edge projects and collaborate with experienced engineers.

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