STA Engineer – Timing Closure
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HCLTech is looking for a highly talented and self-motivated STA Engineer to join it in advancing the technological world through innovation and creativity.
We are seeking an experienced STA Engineer with strong expertise in Static Timing Analysis, timing closure, PrimeTime, SDC, MMMC, SI/OCV analysis, variation modeling, and timing ECOs across block and full-chip designs. You'll drive timing signoff and tape-out readiness while developing automation with TCL and Python to streamline STA tasks.
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